The present disclosure relates to nonvolatile memory devices, and more particularly, to nonvolatile memory devices capable of increasing multi level data write/read speeds.
Nonvolatile memory devices, especially flash memory devices, are widely used for data storage in portable devices (e.g., portable phones and digital cameras) because they are electrically erasable and programmable and can retain data even when powered-down. For implementation of large capacity and low cost, extensive research is being conducted on flash memory devices that can store data of two or more bits in each memory cell. For example, a flash memory device may store two-bit data in each memory cell by having minimum physical voltages causing four different reactions.
FIGS. 6A and 6B are diagrams illustrating the relationship between data of a memory cell of a typical nonvolatile memory device and minimum physical voltage distributions causing a reaction of the memory cell, and corresponding write/read operations.
Referring to FIGS. 6A and 6B, the unit of data written at a time is divided into first and second pages, so that either of the pages may be written first. FIG. 6A shows programming from a second page to a first page, and FIG. 6B shows program programming form a first page to a second page. As shown in both figures, the first page is the least significant bit (LSB) of two-bit data and the second page is the most-significant bit (MSB) of the two-bit data. In an initial state 0, both the first and second pages (LSB and MSB) have a bit value of ‘1’. In FIG. 6A, the second page is first programmed such that the MSB either remains “1” (state 0) or is changed to “0” (state 2), and then the first page is programmed such that either state 0 or state 2 is maintained, or state 0 is changed to state 1, or state 2 is changed to state 3. In FIG. 6B, the first page is first programmed such that the LSB either remains “1” (state 0) or is changed to “0” (state 1), then the second page is programmed such that either state 0 or state 1 is maintained, or state 0 is changed to state 3, or state 1 is changed to state 2. Also shown in FIGS. 6A and 6B are word line voltages A and C for reading first page data, word line voltage B for reading second page data, and word line verify voltages used in a read verify operation. Furthermore, information about whether the first page is written is stored in another memory device to accelerate the read operation.
Also, the method for shifting a minimum physical voltage causing a reaction differs according to the sequence of writing to the pages. There is a large difference between a shift of a minimum physical voltage causing a reaction when programming from the second page to the first page, as illustrated in FIG. 6A, and a shift of a minimum physical voltage causing a reaction when programming from the first page to the second page, as illustrated in FIG. 6B. Thus, write speed is maximized during the second write operation of FIG. 6B. Therefore, average write speed increases, while write speed on spec does not increase as much.